Texas Instruments admits ARM's Big.little is more work for SoC designers - Inquirer

CHIP MAKER Texas Instruments (TI) has told The INQUIRER that ARM's 'Big.little' architecture means more work for chip designers.

TI claims it is a lead partner of ARM but when asked whether having to integrate two different cores into a single package meant extra work for chip designers, Avner Goren, GM of OMAP Strategy at TI agreed, but also said it was worthwhile due to the power saving opportunities.

Goren told The INQUIRER, "Yes it's more work but [power consumption is] also a real problem. At the end of the day I need to sell competitive products [and] not only that, I need to sell products that are compelling to the end user, and I believe this helps me building more compelling products that users will enjoy for better life."

ARM's decision to introduce chips comprising heterogeneous cores had been mentioned back in February at Mobile World Congress. Then Bob Morris, director of mobile computing at ARM told The INQUIRER that a pick-and-mix approach to cores is perfectly feasible. However Goren said that it isn't just a matter of picking a couple of ARM cores and sticking them on the same die.

"You need to have the scalability so you can choose how many of each flavours you have on the silicon. So there was a lot of infrastructure to be developed by ARM to allow such an idea to work," said Goren.

As for what combination TI could be using for its Big.little implementations, Goren said that it could have multiple Cortex A15 cores or multiple Cortex A7 cores. "From a hardware and software point of view ARM's solution doesn't restrict the specific configuration. It's up to the SoC designer to decide the right configuration of Bigs [Cortex A15] and Littles [Cortex A7]. I think the decision needs to be done by a very detailed power analysis of the use cases you are trying to address - that's the way we do these things."

However Goren cautioned that having multiple types of cores doesn't mean the boundaries of physics and cost are suddenly shattered. Goren said, "Beyond this there is a silicon area constraint, you can't put a thousand of each one, you are balancing cost, performance and thermal budget."

Goren also confirmed that TI's next generation OMAP5 chip is well on the way to appearing next year, saying, "OMAP5 sampling this year, production next year is 28nm. A15s will only [be fabbed] in 28nm, meaning our entry point to A15s [is] in 28nm." Goren also confirmed that this will mean that any Big.little processor with Cortex A7 and Cortex A15 cores in it will be fabbed at 28nm. µ